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Taiwan Semiconductor Manufacturing Co. (TSMC) unveiled its next-generation A13 process at its North America Technology Symposium in California on Wednesday.
TSMC's new A13 process targets volume production in 2029, focusing on AI and HPC applications.
KEY POINTS
- A13 shrinks chip area by 6% over A14, maintaining design-rule compatibility for faster nanosheet migration.
- The N2U node, arriving in 2028, offers a 3-4% speed boost or 8-10% power reduction over N2P.
- CoWoS packaging technology expands to 14x reticle size by 2028, enabling 10 compute dies and 20 HBM stacks integration.
- TSMC's SoIC A14-to-A14 stacking, planned for 2029, delivers 1.8 times I/O density of 2nm-based SoIC.
COMPANIES
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