# 英特爾的 EMIB-T 封裝技術已在供應鏈新聞生態系統中存在一段時間，報導指出它可能是 Google 下一代 AI TPU 晶片的關鍵技術。

*genai · news · 2026-06-02 · Wccftech*

## Key points

- 據報導，Google 將採用英特爾的 EMIB-T 封裝技術於其下一代客製化 TPU AI 晶片。
- 力積電與 AP Memory 已加入 Google TPU 的 EMIB 封裝供應鏈。
- AP Memory 的 SiCap 電容器對聯發科設計 Google AI 晶片至關重要。
- SiCap 產量限制至 2027 年 10,000 個單位，可能促使與力積電的擴產合作。
- Google 可能繞過聯發科，直接將晶片設計送交台積電，以尋求成本節省。

With aggressive AI demand burdening TSMC's packaging resources, supply chain reports from Taiwan continue to suggest that Intel's EMIB-T packaging technology is gaining traction with Google. Intel has marketed EMIB, short for Embedded Multi-die Interconnect Bridge, as an alternative to TSMC's Chip-on-Wafer-on-Surface (CoWoS) technology to assemble AI GPUs with components such as memory. Google is expected to be a major EMIB customer, and today's report suggests that additional firms might also be playing a role in the technology's adoption for Google's next-generation custom tensor processing unit (TPU) custom AI chips. Intel's EMIB-T Development Sees Taiwan's Powerchip Semiconductor & AP Memory Technology Corp Enter The Fray Intel's EMIB-T packaging technology, which uses through silicon vias (TSVs) for connectivity, has been in the supply chain news ecosystem for quite some time. Reports have suggested that it might be responsible for Google's next-generation AI TPU chips. One of the first such reports from the Taiwanese outlet Commercial Times suggested in late April that Google was considering EMIB-T for its packaging needs. Chip packaging assembles the computing chip, i.e., the CPU or the GPU, with other components such as memory. It emerged as one of the earliest bottlenecks in the AI wave, and Intel's role in Google's TPU supply chain is courtesy of Google's partnership with MediaTek. Capacitor Production Constraints Purportedly Present In EMIB Supply Chain Now, a fresh report from China Times suggests that Taiwan's Powerchip Semiconductor and AP Memory Technology have also entered Google's TPU supply chain. Powerchip, or PSMC, is a foundry company, while AP Memory is an integrated circuit designer. The report claims that AP Memory's Silicon Capacitors (SiCap) products are playing a key role in MediaTek's design of the Google AI chips. However, it adds that since the SiCap production is expected to sit at 10,000 capacitors by 2027 end, Powerchip might play a role in production expansion as the demand for EMIB grows. The rumors also suggest that executives from the two companies can also meet Intel CEO Lip-Bu Tan for their role in the supply chain. While Intel is expected to be working with Google for packaging the next-generation TPUs, the final orders might depend on the firm's production yield. To save costs, Google is also reportedly interested in sending the chip's designs directly to TSMC instead of working through MediaTek. Intel has claimed that EMIB offers several advantages over CoWoS. These include lower costs, greater scalability and performance equivalent to higher-end technologies such as SoW.

**Companies:** Intel, Google, Powerchip Semiconductor, AP Memory Technology
**Countries:** Taiwan, China, USA

[Read the full story on Wccftech](https://wccftech.com/intels-emib-t-packaging-pulls-two-more-taiwanese-suppliers-into-googles-tpu-orbit-as-tsmcs-cowos-strains/)

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Canonical: https://newsio.io/zh-TW/n/1c73d495-f00c-4557-a625-cf662aecb282/emib-t-google-ai-tpu
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